BSE (UK) Ltd is the exclusive distributor for GÖPEL electronic in the UK and Ireland.
GÖPEL electronic is the worldwide market leader of innovative Boundary Scan components and systems, including fully developed software tools, high performance controllers and comprehensive product support.
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Founded in 1991, GÖPEL electronic presently employs more than 80 people in its headquarters in Jena/Germany. GÖPEL has been active since the beginning of Boundary Scan, rapidly responding to new Boundary Scan developments and adding features to their product portfolio. Today, there are over 1400 GÖPEL boundary scan systems in use worldwide. The worldwide distribution network includes more than 250 specialists providing local product sales and support expertise. |
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Contact Paul Phillips to discuss your requirements and how we can help you.
Testing and programming modern digital PCBs is becoming more difficult and complex. Traditional in-circuit testing, using bed-of-nails technology, struggles to cope with today's high density surface mount devices and packages such as BGA, µBGA and chip-on-board (COB).
When combined with a solid "design-for-test" approach, Boundary Scan overcomes many of these problems. Boundary Scan can access the nets on a board using the pins of the ICs on the board themselves. A simple 5 wire test bus connects to the test hardware, eliminating fixturing problems.
Additionally, Gopel's Boundary Scan Software - System CASCON - generates test and ISP programs automatically from the board's design data. Application generation times are measured in days rather than weeks. The CASCON software also gives excellent diagnostic information for shorts and opens on the board, at pin level for opens and net level for shorts.
All of this makes Boundary Scan an ideal technique for low volume applications such as prototype verification and development, as well as mainstream production testing.
Contact
Paul Phillips to discuss your requirements and how we can help
you.
Boundary scan is a technique for taking control over the pins of an IC using a simple four or five wire test bus (sometimes referred to as the JTAG bus, after the Joint Test Action Group which was set up to standardise boundary scan).
Although the boundary scan IC may have a complex function (such as microprocessor, DSP, ASIC or CPLD) the test bus can be used to isolate the core logic of the IC from its physical pins. The TAP controller, which drives the test bus, can then control the state of the IC's output pins by serially shifting control data into its test access port (TAP). At the same time, data captured on the IC's input pins is shifted into the TAP controller for analysis. Several devices can be hooked up to a single test bus by connecting their data lines in series, making the serial chain longer.
Apart from controlling the input and output pins of a device, Boundary Scan can be used to send and receive data from internal registers in the device's TAP. These are used for many purposes including identifying the IC, running Built-in-Self-Test (BIST) routines, for programming devices like FPGAs and for debugging microprocessors in their BDM mode.
Traditional techniques to control and monitor the state of nets on a PCB include bed-of-nails and clip-over type fixtures. Boundary scan has no need for these types of access as the IC pins can be directly controlled via the test bus. This makes fixturing very simple and allows higher board density.
Contact
Paul Phillips to discuss your requirements and how we can help
you.
The picture shows a typical target Boundary Scan UUT. The tests and in-system are broadly targeted at these areas:
Boundary Scan Infrastructure. This is a test of the test bus and the internal workings of the boundary scan components. CASCON can diagnose failures in the scan chain down to net level.
Boundary Scan Interconnections. This is a test of the boundary-scan pin to boundary-scan pin interconnections. Any transparent components such as in-line resistors, buffers etc. will be automatically included in the test, as well as any pull-up or pull-down resistors. CASCON can diagnose opens and shorts to pin level / net level.
RAM Interconnections. This is a test of the boundary-scan pin to memory pin interconnections. CASCON can diagnose opens and shorts to pin level / net level.
Cluster testing. This is the test of a cluster of components which have boundary scan access to the cluster periphery but not internally. Clusters can be single devices (eg GALs), digital device clusters or analog / mixed-signal clusters. CASCON's high level programming language allows quite complex test procedures to be written.
Device Testing. Here, the test access port of the boundary scan device is used to run an internal built-in self-test (BIST) on the device.
Programming for FPGAs and CPLDs. Here, the the test access port of the programmable device is used to blow internal fuses and program the device.
Programming for memories like FLASH devices. These memories are not usually boundary scan devices. Here, the boundary scan pins attached to the memory are used to manupulate the memory pins just as if the device was in a programmer. FLASH programming is the most highly data-intensive boundary scan application, often dealing with gigabits of information.
Integration into third party tools. The open architecture of Göpel's CASCON software naturally lends itself to integration into third party tools. There are many paths open to implement this kind of integration, including the use of DDE links or DLL calls as well as controlling hardware links like ethernet, RS232, GPIB and so on.
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Paul Phillips to discuss your requirements and how we can help
you.
System CASCON™ - Universal Software for Test and In-Circiut Programming
CASCON is the market leading Boundary Scan software package with many expert features developed from the experience of over 5000 applications. The software's modern Windows user interface is a fully integrated environment giving access to a range of tools for test program development, board verification with diagnostics down to pin level and in-system programming. CASCON automatically handles all of the complex testbus protocol, leaving the developer to concentrate on the task of developing his test strategy.
The development process starts with the UUT's design CAD data (parts list and net list) and library models for the ICs on the board (taken from BSDL files). CASCON analyses the input data to provide the basis for automatic generation of tests covering the scan chain and opens and shorts for the board's interconnects, including in-line components (buffers and resistors) pull ups / downs and memory chips. Additionally, procedures to program on-board parts like FPGAs, CPLDs, FLASH and EEPROMs can be automatically generated. More complex tests, perhaps for analog or digital clusters, can be generated from a truth-table or using CASCON's high level programming language.
The software's diagnostic processors work at run-time, in conjunction with the automatic program generators, to give a comprehensive indication of any detected faults. These work at pin level for open and stuck-at faults and net level for shorts. Additionally, the system's interactive debugger allows boards and programs to be debugged at source level with all of the features you would expect from a high level language debugger. These include possibilies for setting break points, triggers depending on pin states as well as monitoring the state of pins, groups of pins, variables and so on.
CASCON has many additional features including those mentioned in the chart below:
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Paul Phillips to discuss your requirements and how we can help
you.
POLARIS™ - Specialist software for in-System programming
POLARIS is a development of the CASCON software, specifically for in-System programming applications. POLARIS can program all types of in-system programmable parts in a single operation. POLARIS can also take into account scan router devices like Addressable Scan Ports, Scan Path Linkers and Scan Bridges.
For FPGAs and CPLDs the software imports the native design programming data in SVF, XSVF, JAM, STAPL or IEEE 1532 format. STAPL and SVF format data can also be re-exported.
For FLASH memory programming POLARIS uses its powerful automatic FLASH programming generator (AFPG). This analyses the structure of the board from the CAD data, gets the programming algorithm from a library file for the FLASH device to be programmed. It then automatically generatres the FLASH programming procedure and integrates the FLASH image data at run-time. POLARIS fully utilises the SPACE™ architecture of the Göpel range of TAP controllers (see below) for maximum programming throughput.
Programs which have been generated with POLARIS can be integrated into third-party software by the use of DLL access.
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Paul Phillips to discuss your requirements and how we can help
you.
The broadest family of Boundary Scan Controller hardware
The Boundary Scan controller is the hardware interface to the UUT's scan chain. The Göpel range of controllers covers the widest range of platforms in the marketplace. This enables our customers to use test and ISP applications across the entire product life cycle - from development, through production and into repair and field support. We currently supply controllers running on:
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Each controller (except the parallel port controller) has two independent test access ports (TAPs) each of which can handle four UUTs in parallel, allowing a total of eight UUTs to be tested / programmed simultaneously. Additionally, each controller has 32 pins of parallel I/O which can be used to access the UUT independently of the scan chain. These are useful for all sorts of tasks like driving RESET lines, switching power to the UUT (via relays), energising vacuum switches for test fixtures and so on.
The 'A' versions of the controllers are suitable for test / development applications and run with a maximum Tck of 16MHz. The 'B' versions are used in production applications. They have programmable TAP levels between 1.8V and 3.6V and can run at up to 30MHz Tck. They also incorporate the unique SPACE™ architecture - described below.
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Paul Phillips to discuss your requirements and how we can help
you.
Boundary Scan can be a highly data intensive activity. It is not unusual for an application to involve the manipulation of many gigabits of data. Göpel's patented SPACE architecture handles this data with the minimum of interaction with the host processor (usually a PC). Thus it is possible to continuously burst data into the UUT at speeds of up to 30MHz with hardly any gaps between successive scan operations. The UUT's responses are compared with expected data in real-time, within the controller. Also, FLASH image data is implanted into the scan sequence in hardware which allows arbitrarily large FLASH memories to be programmed without any delays in re-loading the controller's memory.
To further speed up FLASH programming, SPACE incorporates the DUALSCAN™ feature which allows parallel I/O port vectors to be synchronised with the TAP operations. Parallel I/O ports can be connected to time-critical nets in the UUT, such as the FLASH control bus (WE, OE and CE) to substantially reduce delays caused by scan chain operations in the programming process.
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Paul Phillips to discuss your requirements and how we can help
you.
Connecting between the UUT and the controller
This is a critical part of any boundary scan application. Competitive systems to Göpel Electronic typically have to use pods which must be located within 15cm of the UUT's TAP. In many cases this proves to be quite inconvenient and expensive. The Göpel TAP controllers have special line drivers on their outputs which can drive transmission lines up to two meters in length without problems. When combined with the Göpel TAP access board with its test clips this makes for a neat and flexible interface to the UUT.
Some applications - especially where the boundary scan system is integrated into a third party test system - require even more than 2 metres between the UUT and the TAP controller. The danger here is that the round-trip delays to the UUT and back can restrict the maximum Tck which can be used, damaging throughput in a production environment. Bear in mind that at 30MHz one wavelength is only 10m long! Our solution to this comes in the form of a distance pod. It uses LVDS technology to drive a transmission line up to 10 metres long. Combined with this is the ADYCS™ (Active Delay Compensation) feature of the SPACE architecture. This compensates for round-trip delays in the cabling and UUT and allows full speed operation at up to 30MHz even with long distances between the TAP and the UUT.
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Paul Phillips to discuss your requirements and how we can help
you.
SCANPLUS® Modules to Extend Test Coverage
Almost all boundary scan applications have limitations on test coverage because of the structure of the UUT. There are always non-scannable nets, perhaps analog nets and also limited coverage on scannable nets. Any boundary scan pin, for example, connected to a net which does not have another boundary scan pin cannot be tested for an open circuit. These types of net very often have an external connector. ScanPlus modules can be used to introduce a second boundary scan pin to these types of net, either through a connector or perhaps a bed of nails, to improve test coverage. Thus, non-scannable nets, logic clusters, connectors, cables, backplanes and multi-chip modules can be tested using ScanPlus modules.
This concept can be extended to build up a complete test environment. Scanplus modules are available with digital I/O pins, mixed signal I/O pins, relays, power supplies and application specific modules. These are supplemented by a range of racks to house the Scanplus modules and several standard fixtures for UUTs which are based on the PCI bus, PC card (PCMCIA) and CPCI/PXI
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Advantages of ScanPlus modules:
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Type of Scanplus Module
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Features
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Category
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Product
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Channels
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I/O levels
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Current (mA)
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Power relays
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Size (19")
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| Digital I/O | SCP D096 (x)-1/2 |
96
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5V / 3.3V
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±32
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3
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6U / 4HP
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| SCP D192 (x)-1/2 |
192
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5V / 3.3V
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±32
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3
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6U / 4HP
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| SCP D384 (x)-1/2 |
384
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5V / 3.3V
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±32
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3
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6U / 4HP
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| SCP D024 (x)-3/4 |
24
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±2 to 40V
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±50
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6U / 4HP
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| SCP D048 (x)-3/4 |
48
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±2 to 40V
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±50
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6U / 4HP
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| SCP D096 (x)-3/4 |
96
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±2 to 40V
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±50
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6U / 4HP
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| SCP D002 (x)-5 |
2
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±10V
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±400
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3
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6U / 4HP
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| SCP D004 (x)-5 |
4
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±10V
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±400
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3
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6U / 4HP
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| SCP D008 S-5 |
8
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±10V
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±400
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3
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6U / 4HP
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| Mixed Signal I/O | SCP M002 (x)-5 |
2
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±10V / 12 bit
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±400
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3
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6U / 4HP
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| SCP M004 (x)-5 |
4
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±10V / 12 bit
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±400
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3
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6U / 4HP
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| SCP M008 S-5 |
8
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±10V / 12 bit
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±400
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3
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6U / 4HP
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| Signal Probing Module | SCP X701 M |
1
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±10V
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±400
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3
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6U / 4HP
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| Racks | SCP R300N | 3 Slots |
2U / 84HP
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| SCP R500N | 5 Slots |
3U / 84HP
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| SCP R700N | 7 Slots |
4U / 84HP
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Contact
Paul Phillips to discuss your requirements and how we can help
you.
System applications for the Entire Product life cycle
Used intelligently, Boundary Scan is more than a method for test and programming. It can significantly contribute to cost reduction and a shorter time-to-market. This can only be achieved by adopting a global application philosophy from design, through manufacturing to the servicing phases of a product's lifetime.
Göpel Electronic provides a unique product portfolio for this, especially with the ability to integrate into third party systems (see below). At each stage in a product's life cycle the advantages of CASCON's integrated development and execution environment come into play. The software's flexibility in being supplied as a programming station, test station and repair station, combined with features like multi-user handling, batch execution different levels of operator authorisation and programmable report headers allow the software to meet production needs without purchasing any additional tools.
Also, our range of TAP controllers covers all applications. High performance controllers for production include the PCI, PXI and VXI bus based models. For development we have the 'A' series of controllers which are highly cost-effective whilst maintaining functional compatibility with their 'B' counterparts. For service use we have the USB and PC card (PCMCIA) controllers.
Contact
Paul Phillips to discuss your requirements and how we can help
you.
Integrating into third party tools
In addition to use as stand-alone systems, Göpel's Boundary Scan solutions are uniquely designed for ease of integration with third party test systems. From a hardware point of view this is clear from the wide range of TAP controllers and the ability to locate the UUT at a distance from the TAP controller (see connecting between the UUT and the controller above). On the software side this is even more apparent. CASCON and POLARIS can be accessed using DDE links or via a DLL. The DLL functionality extends from relatively high level tasks such as running an existing program or sequence of programs, down to a very low level including the setting and monitoring of individual pins on the UUT. This latter capability is extremely important in design proving test as well as Mixed Signal ATE.
The DLL can be integrated into test systems running under any 32 bit Windows version. Programming can be in C, C++, Pascal, BASIC, TestStand™, LabWindows™ and LabVIEW™.
Contact
Paul Phillips to discuss your requirements and how we can help
you.
